Strain engineering can result in increased performance in semiconductor devices, such as, for example, complementary metal-oxide semiconductor (CMOS) devices. Tensile strain is beneficial for n-type field-effect transistors (NFETs) and compressive strain is beneficial for p-type field-effect transistors (PFETs).
However, when silicon germanium (SiGe) or silicon (Si) fins are physically cut into desired lengths to meet design requirements, strain relaxes at fin ends near where cuts are made. The edge relaxation reduces the benefits provided by strain and causes device degradation and variation.
Accordingly, there is a need for preserving strain in semiconductor devices, such as fin field-effect transistor (FinFET) devices.